| Information | |
|---|---|
| has gloss | (noun) (computer science) a kind of computer architecture that has a relatively small set of computer instructions that it can perform reduced instruction set computer, RISC, reduced instruction set computing |
| has gloss | eng: A reduced instruction set computing (acronym RISC pronounced risk), represents a CPU design method to simplify instructions which "do less" but provide higher performance by making instructions execute very fast. |
| has gloss | eng: Reduced instruction set computer or RISC (pronounced risk) is a CPU design strategy based on the insight that simplified instructions can provide higher performance if this simplicity enables much faster execution of each instruction. There are many proposals for a precise definition but the term is slowly being replaced by the more descriptive load-store architecture. Well known RISC families include DEC Alpha, AMD 29k, ARC, ARM, Atmel AVR, MIPS, PA-RISC, Power (including PowerPC), SuperH, and SPARC. |
| lexicalization | eng: Reduced instruction set computer |
| lexicalization | eng: reduced instruction set computing |
| lexicalization | eng: RISC |
| subclass of | (noun) (computer science) the structure and organization of a computer's hardware or system software; "the architecture of a computer's system software" architecture, computer architecture |
| Meaning | |
|---|---|
| Arabic | |
| has gloss | ara: ملاحظة |
| lexicalization | ara: مجموعة تعليمات بنية الحاسب |
| Bosnian | |
| has gloss | bos: RISC je skraćenica za Reduced Instruction Set Computer ili tip procesora sa smanjenim skupom naredbi. Filozofija RISC-a svodi se na: |
| lexicalization | bos: RISC |
| Catalan | |
| has gloss | cat: RISC (Reduced Instruction Set Computer) és un tipus de microprocessador que reconeix un nombre típicament reduït dinstruccions de codi màquina. Són estructuralment més simples que els CISC i estan formats per un nombre molt més reduït de transistors, característica que els fa més barats, més ràpids i més eficients pel que fa a la dissipació descalfor (Efecte Joule) i de retruc, permet estalviar costos en refrigeració.Aquest tipus de processador està basat bàsicament en el model modern de Von Neumann |
| lexicalization | cat: RISC |
| Czech | |
| has gloss | ces: RISC označuje jednu z architektur procesorů. Zkratka pochází z anglického Reduced Instruction Set Computer, v překladu počítač s redukovanou instrukční sadou. Jejím protikladem jsou počítače s komplexní instrukční sadou (Complex Instruction Set Computers, CISC). |
| lexicalization | ces: RISC |
| Danish | |
| has gloss | dan: RISC (Reduced Instruction Set Computing) betegner en retning indenfor mikroprocessor-design fra midten af 1980'erne, der opprioriterer hurtig, simpel hardware på bekostning af øget kompleksitet i software (set fra en programmørs synspunkt blev mikroprocessoren sværere at bruge og havde flere særheder). Formålet med at gøre hardwaren simplere var at frigøre ressourcer på chippen således at de frigjorte ressourcer kunne anvendes til ydelsesforøgende komponenter såsom hurtigt nær-lager (cache). Retningen var et brud med den tidligere CISC-filosofi. |
| lexicalization | dan: RISC |
| German | |
| has gloss | deu: Reduced Instruction Set Computer (RISC) (engl. für Rechner mit reduziertem Befehlssatz) ist eine Designphilosophie für Computerprozessoren, bei der einfache Befehle eine gut balancierte Pipeline mit schneller Taktung ermöglichen, was RISC-Prozessoren sehr effizient macht. RISC steht im Gegensatz zum CISC-Prozessordesign. |
| lexicalization | deu: Reduced Instruction Set Computer |
| Persian | |
| has gloss | fas: معماری ریسک یک نوع معماری ساخت ریزپردازنده می‌باشد. در این معماری بجای استفاده از دستورالعمل‌های خاص منظوره، که در سایر معماری ها مرسوم است، از یک مجموعه دستورالعمل فوق‌العاده بهینه‌سازی شده استفاده می‌شود. |
| lexicalization | fas: معماری ریسک |
| Finnish | |
| has gloss | fin: RISC (Reduced Instruction Set Computer) on tietokoneiden suoritinarkkitehtuurien suunnittelufilosofia, jossa konekielen käskyt on pyritty pitämään yksinkertaisina ja nopeasti vakioajassa suoritettavina. Aiemmin suosittu lähestymistapa oli CISC, jossa pyritään tekemään käskykannasta mahdollisimman laaja ja monipuolinen ja sitä kautta tehokas. |
| lexicalization | fin: RISC |
| French | |
| has gloss | fra: Le microprocesseur à jeu dinstruction réduit ou en anglais est une architecture matérielle de microprocesseurs. On la opposé à la fin des années 1980 et au début des années 1990 à larchitecture CISC . La sortie darchitectures hybrides comme le Pentium a mis fin, par disparition de repères, à cette guerre qui était devenue bien plus marketing que technique vers 1990, les techniques ayant évolué de part et dautre et chacune comparant ses procédés à ceux de lautre... six ans plus tôt. |
| lexicalization | fra: Reduced instruction set computer |
| Galician | |
| lexicalization | glg: RISC |
| Serbo-Croatian | |
| has gloss | hbs: Reduced instruction set computer ili RISC je procesor sa smanjenim skupom naredbi. Većina novih procesora je bazirani na RISC arhitekturi u samoj svojoj jezgi, no takvi procesori prevode CISC instrukcijski set u RISC kako bi se postigla veća brzina izvršavanja. Prvi takvi procesori datiraju iz doba Pentiuma I. |
| lexicalization | hbs: Reduced instruction set computer |
| Croatian | |
| has gloss | hrv: RISC je kratica za Reduced Instruction Set Computer ili tip središnje jedinice (procesora) sa smanjenim skupom naredbi. Filozofija RISC-a svodi se na: |
| lexicalization | hrv: RISC |
| Hungarian | |
| has gloss | hun: A RISC angol rövidítés (Reduced Instruction Set Computer, „csökkentett utasításkészletű számítógép”) egy, a számítógépek processzorának tervezésénél alkalmazott filozófia. |
| lexicalization | hun: RISC |
| Indonesian | |
| has gloss | ind: Sejarah Reduced Instruction Set Computing (RISC) atau "Komputasi set instruksi yang disederhanakan" pertama kali digagas oleh John Cocke, peneliti dari IBM di Yorktown, New York pada tahun 1974 saat ia membuktikan bahwa sekitar 20% instruksi pada sebuah prosesor ternyata menangani sekitar 80% dari keseluruhan kerjanya. Komputer pertama yang menggunakan konsep RISC ini adalah IBM PC/XT pada era 1980-an. Istilah RISC sendiri pertama kali dipopulerkan oleh David Patterson, pengajar pada University of California di Berkely. |
| lexicalization | ind: RISC |
| Italian | |
| has gloss | ita: RISC, acronimo dell'inglese Reduced Instruction Set Computer, indica una filosofia di progettazione di architetture per microprocessori formate da un set di istruzioni contenente istruzioni in grado di eseguire operazioni semplici che possono essere eseguite in tempi simili. Questa filosofia di progettazione è opposta a quella alla base delle architetture CISC (complex instruction set computer) che invece prediligono processori dotati di istruzioni anche molto complesse con tempi di esecuzione molto diversi a seconda delle istruzioni. I più comuni processori RISC sono:AVR, PIC, ARM, DEC Alpha, PA-RISC, SPARC, MIPS e POWER. |
| lexicalization | ita: RISC |
| Japanese | |
| has gloss | jpn: RISC（りすく、、縮小命令セットコンピュータ）は、コンピュータの命令セットアーキテクチャ(ISA)の設計手法の一つで、命令の種類を減らし、回路を単純化して演算速度の向上を図るものである。なお、RISCが提唱されたときに、従来の設計手法に基づくアーキテクチャは対義語としてCISCと呼ばれる様になった。 |
| lexicalization | jpn: RISC |
| Korean | |
| has gloss | kor: RISC(reduced instruction set computer)는 CPU 명령어의 개수를 줄여 하드웨어 구조를 좀 더 간단하게 만드는 방식으로, 마이크로프로세서를 설계하는 방법 가운데 하나이며, SPARC, MIPS 등의 아키텍처에서 사용된다. |
| lexicalization | kor: RISC |
| Latvian | |
| has gloss | lav: RISC (no - "samazinātas instrukciju kopas dators" jeb Reduced Instruction Set Computing) ir centrālā procesora izveides filozofija, kuras pamatā ir samazināts instrukciju skaits, un šo instrukciju izpildes laiks ir īss. |
| lexicalization | lav: RISC |
| Lithuanian | |
| has gloss | lit: RISC – centrinių procesorių architektūra, pasižyminti paprastesne komandų sistema. |
| lexicalization | lit: RISC |
| Dutch | |
| has gloss | nld: Een Reduced instruction set computer, acroniem RISC is een processor die werkt met een kleine set simpele basisinstructies. Dit in tegenstelling tot Complex instruction set computers (CISC), die werken met een relatief omvangrijke set complexe instructies. |
| lexicalization | nld: Reduced instruction set computer |
| lexicalization | nld: RISC |
| Norwegian Nynorsk | |
| has gloss | nno: Reduced Instruction Set Computing (RISC) er ein prossesortype som i motsetnad til eldre CISC-prosessorar er baserte på nokre få, einfelde instruksjonar. |
| lexicalization | nno: RISC |
| Norwegian | |
| has gloss | nor: Reduced instruction set computer (RISC) er en type mikroprosessor som i motsetning til CISC-prosessorer kan utføre relativt få instruksjoner. Til gjengjeld tar hver instruksjon kort tid å utføre. |
| lexicalization | nor: Reduced instruction set computer |
| Polish | |
| has gloss | pol: RISC (Reduced Instruction Set Computers) - nazwa architektury mikroprocesorów która została przedstawiona pod koniec lat 70. w teoretycznych pracach na uniwersytecie Berkeley oraz w wynikach badań Johna Cocke z Thomas J. Watson Research Center. |
| lexicalization | pol: RISC |
| Portuguese | |
| has gloss | por: Reduced Instruction Set Computer ou Computador com um Conjunto Reduzido de Instruções (RISC), é uma linha de arquitetura de processadores que favorece um conjunto simples e pequeno de instruções que levam aproximadamente a mesma quantidade de tempo para serem executadas. A maioria dos microprocessadores modernos são RISCs, por exemplo DEC Alpha, SPARC, MIPS, e PowerPC. O tipo de microprocessador mais largamente usado em desktops, o x86, é mais CISC do que RISC, embora chips mais novos traduzam instruções x86 baseadas em arquitetura CISC em formas baseadas em arquitetura RISC mais simples, utilizando prioridade de execução. |
| lexicalization | por: Risc |
| Russian | |
| has gloss | rus: RISC (; неправильно — Reduced Instruction Set Computing) — компьютер с сокращённым набором команд. |
| lexicalization | rus: RISC |
| Slovak | |
| has gloss | slk: Reduced instruction set computer, skrátene RISC (doslova počítač s obmedzenou sadou inštrukcií) je architektúra procesorov s priamočiarym vykonávaním pomerne jednoduchých inštrukcií. |
| lexicalization | slk: Reduced instruction set computer |
| Slovenian | |
| has gloss | slv: RISC je angleška kratica za Reduced Instruction Set Computer. To je tip mikroprocesorjev, ki imajo relativno manjši nabor ukazov. Prednost tehnologije je, da so procesorji hitrejši in cenejši, strojna oprema pa je tudi cenejša za izdelavo. |
| lexicalization | slv: RISC |
| Castilian | |
| has gloss | spa: De Arquitectura computacional, RISC (del inglés Reduced Instruction Set Computer), Computadora con Conjunto de Instrucciones Reducidas. |
| lexicalization | spa: RISC |
| Serbian | |
| has gloss | srp: RISC je skraćenica za Reduced Instruction Set Computer ili tip procesora sa smanjenim skupom naredbi. Filozofija RISC-a svodi se na: |
| lexicalization | srp: RISC |
| Swedish | |
| has gloss | swe: RISC är en akronym för Reduced Instruction Set Computer (alternativt Load-Store arkitektur som är ett mer korrekt namn). RISC-principerna utvecklades av IBMs Watson Research Center mellan 1975 och 1979 när den första RISC-processorn med namnet 801 levererades. |
| lexicalization | swe: RISC |
| Thai | |
| has gloss | tha: Reduced Instruction Set Computer (RISC) เป็นไมโครโพรเซสเซอร์ชนิดหนึ่งที่มีชุดคำสั่งจำนวนไม่มากนัก ตรงข้ามกับ CISC (Complex Instruction Set Computer) คอมพิวเตอร์แบบ RISC สามารถกระทำการตามคำสั่งได้อย่างรวดเร็วมากเพราะคำสั่งจะสั้น นอกจากนั้นชิพแบบ RISC ยังผลิตได้ง่ายกว่าอีกด้วย (เนื่องจากใช้จำนวนทรานซิสเตอร์น้อยกว่า) ตัวอย่างชิพประเภทนี้ได้แก่ ARM, DEC Alpha, PA-RISC, SPARC, MIPS, และ PowerPC |
| lexicalization | tha: RISC |
| Turkish | |
| has gloss | tur: İndirgenmiş komut takımı bilgisayarı, (İngilizce: Reduced instruction set computer veya RISC), işlemcinin tasarım mimarisini ifade eder. |
| lexicalization | tur: İndirgenmiş komut takımı bilgisayarı |
| Ukrainian | |
| has gloss | ukr: RISC — архітектура процесорів зі скороченим набором команд. Ще відома як «Load/Store» архітектура. Найбільш відомі представники: DEC Alpha, ARC, ARM, AVR, MIPS, PA-RISC, Power Architecture (включаючи PowerPC), SuperH, та SPARC. |
| lexicalization | ukr: RISC |
| Vietnamese | |
| has gloss | vie: RISC (viết tắt của Reduced Instructions Set Computer - Máy tính với tập lệnh đơn giản hóa) là một phương pháp thiết kế các bộ vi xử lý (VXL) theo hướng đơn giản hóa tập lệnh, trong đó thời gian thực thi tất cả các lênh đều như nhau. Hiện nay các bộ vi xử lý RISC phổ biến là ARM, SuperH, MIPS, SPARC, DEC Alpha, PA-RISC, PIC, và PowerPC của IBM. |
| lexicalization | vie: RISC |
| Chinese | |
| has gloss | zho: 精简指令集，是计算机中央處理器的一种设计模式，也被称为RISC(Reduced Instruction Set Computing 的缩写)。这种设计思路对指令数目和寻址方式都做了精简，使其实现更容易，指令并行执行程度更好，编译器的效率更高。目前常見的精簡指令集微處理器包括DEC Alpha、ARC、ARM、AVR、MIPS、PA-RISC、Power Architecture(包括PowerPC、PowerXCell)和SPARC等。 |
| lexicalization | zho: 精简指令集 |
| Media | |
|---|---|
| media:img | Architettura Pentium 4.png |
| media:img | Cellchip.jpg |
| media:img | Conexant arm.jpg |
| media:img | Control Data 6600 mainframe.jpg |
| media:img | DEC Alpha 21-35023-13 J40793-28 top.jpg |
| media:img | DiagramaRISC.jpg |
| media:img | HP PA-RISC 7300LC.jpg |
| media:img | IBM PowerPC601 PPC601FD-080-2 top.jpg |
| media:img | Pipeline MIPS.png |
| media:img | PowerPC G4e.png |
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